[Bare metal] Reading the 64-bit counter
Edited by rpidmx512 at 2018-6-15 12:23Example for how to read the 64-bit counter
.macro FUNC name
.text
.code 32
.global \name
\name:
.endm
FUNC h3_read_cnt64
mov r2, #0x1e00
mov r0, #2
movt r2, #0x1f0
str r0,
1:
ldr r3,
tst r3, #2
bne 1b
ldrd r0,r1,
bx lr dmx512 replied at 2018-6-27 00:58
What is this code used for ?
It's used for reading the 64 bit counter.
I was using the memory mapped register method for a system timer until I realised that just using the coprocessor interface for it was far simpler.
That single line I provided reads the 64 bit counter via the coprocessor interface instead of the memory mapped interface. That's all. It grabs the whole 64 bits at once and puts them into two registers. My example uses a1 and a2, or if you like R0 and R1. Same thing. I believe they cn be any general purpose registers though.
Edited by ImmortanJoe at 2018-6-23 09:48
MRRC p15, 0, a1, a2, c14
copypasted from my code. a1 is low word. a2 is high word.
e:This is for the H3. It'd probably be similar on other SoCs.
MRRC p15, 0, a1, a2, c14
What is this code used for ? Edited by ImmortanJoe at 2018-7-1 10:59
Besides the H3 datasheet, the following documents are extremely useful regarding working with the H3:
* ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition
* Cortex -A7 MPCore Technical Reference Manual
* CoreLink GIC-400 Generic Interrupt Controller Technical Reference Manual
* Allwinner DE2.0 Specification
* Enhanced Host Controller Interface Specification for Universal Serial Bus
* i.MX 6Dual/6Quad Applications Processor Reference Manual (for the graphics hardware)
e: Forgot to say before the MPCore TRM is where a lot of useful things are like coprocessor interface information. The H3 core doesn't really seem to have been altered from the A7 MPCore design in any significant way.
ImmortanJoe replied at 2018-6-30 07:12
It's used for reading the 64 bit counter.
I was using the memory mapped register method for a sys ...
This is great information. Thank you!
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