The Camera Interface is a high speed port with an 8-bit parallel interface, probably having higher bandwidth than the GPIO connector.
I would like to use it to interface to an FPGA. Therefore I need to know:
1. Can I write to the camera port (i.e. the FPGA) or is it read-only? If it is read-only, I can use the GPIO serial interfaces to write to the FPGA for setup and other slow functions.
2. Is it 3.3V like all the orther interfaces?
3. Where can I find the S/W which currently reads and writes to this interface? I need to disable the camera S/W and replace it with my own FPGA S/W.
4. Is there anything in the OPi hardware that is specific to a camera-interface, like DMAs to a graphics module in the OPi SOC? I would need to DMA to my own S/W buffer in RAM, or else design the FPGA to do all processing of data and simply read results of the processing without using DMA.
5. Is this a reasonable task to undertake or impossible because of poor documentation on the SOC and Linux kernel to handle it? Maybe someone has tried this project on a RPi which is better documented. If this project is too difficult, my fall-back is to use the SPI/I2C/UART capability on the GPIO connector to interface to the FPGA.
Thanks,

Edited by RobertChong at 2022-5-31 16:26

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