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[Solved] 2x Orange Pi 4Bs - one can boot armbian one can't

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Published in 2020-7-11 19:35:05 | Show all floors |Read mode
Edited by patrix at 2020-7-12 11:24


Solved: I ended up dumping the image of the working unit's emmc with dd, and dd'ing that to the other unit's emmc, now I can boot Armbian again!


I have 2 Orange Pi 4B, and they are not behaving the same. Now I'm pretty sure that is my fault, however I am seeking some pointers in order to help solve this. Unit A is the problematic one, Unit B is the normal one.


Unit A:
- When I first got it, eMMC came with Android. I tried various Orange Pi Ubuntu and Armbian images, booting from sdcard, also Orange Pi's Android image booting from SD
- At some point I installed Armbian to the eMMC using nand_sata_install, and that was working fine as well
- Not sure what I did after that, I think I booted from SD and used dd to flash an image to the eMMC, and since that time:

- I can boot Orange Pi's Ubuntu Bionic image v 1.2 or v1.3 from the micro SD card

- I can install Orange Pi Ubuntu Bionic Image to the eMMC using install_to_emmc script, and boot successfully from eMMC
- However when micro SD card is inserted, it boots from SD instead of eMMC

eMMC appears as: /dev/mmcblk1
sdcard appears as: /dev/mmcblk0


Unit B:
- boots any image from sdcard, Armbian, Android or Orange Pi's images

eMMC appears as: /dev/mmcblk2
sdcard apepars as: /dev/mmcblk1


I would like to be able to boot Armbian or Android once more on Unit A.. Any pointers appreciated.

Pat.


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 Author| Published in 2020-7-12 11:23:56 | Show all floors
What I ended up doing:

- dd the emmc of Unit B to an image file
- dd that image file to the emmc of Unit A

Now I can boot Armbian!

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 Author| Published in 2020-7-11 20:27:48 | Show all floors
Below are serial outputs when (1) booting OPi Ubuntu, (2) trying to boot Armbian.

Based on errors, I tried the solution here:

https://forum.armbian.com/topic/ ... t&comment=94140

dd if=/dev/zero of=/dev/mmcblk1 bs=1M seek=14900

To no avail.. Troubleshooting continues


Serial output when booting the Orange Pi Ubuntu:

  1. DDR Version 1.22 20190506
  2. In
  3. channel 0
  4. CS = 0
  5. MR0=0x18
  6. MR4=0x1
  7. MR5=0x1
  8. MR8=0x8
  9. MR12=0x72
  10. MR14=0x72
  11. MR18=0x0
  12. MR19=0x0
  13. MR24=0x8
  14. MR25=0x0
  15. CS = 1
  16. MR0=0x18
  17. MR4=0x1
  18. MR5=0x1
  19. MR8=0x8
  20. MR12=0x72
  21. MR14=0x72
  22. MR18=0x0
  23. MR19=0x0
  24. MR24=0x8
  25. MR25=0x0
  26. channel 1
  27. CS = 0
  28. MR0=0x18
  29. MR4=0x1
  30. MR5=0x1
  31. MR8=0x8
  32. MR12=0x72
  33. MR14=0x72
  34. MR18=0x0
  35. MR19=0x0
  36. MR24=0x8
  37. MR25=0x0
  38. CS = 1
  39. MR0=0x18
  40. MR4=0x1
  41. MR5=0x1
  42. MR8=0x8
  43. MR12=0x72
  44. MR14=0x72
  45. MR18=0x0
  46. MR19=0x0
  47. MR24=0x8
  48. MR25=0x0
  49. channel 0 training pass!
  50. channel 1 training pass!
  51. change freq to 416MHz 0,1
  52. Channel 0: LPDDR4,416MHz
  53. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  54. Channel 1: LPDDR4,416MHz
  55. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  56. 256B stride
  57. channel 0
  58. CS = 0
  59. MR0=0x18
  60. MR4=0x1
  61. MR5=0x1
  62. MR8=0x8
  63. MR12=0x72
  64. MR14=0x72
  65. MR18=0x0
  66. MR19=0x0
  67. MR24=0x8
  68. MR25=0x0
  69. CS = 1
  70. MR0=0x18
  71. MR4=0x1
  72. MR5=0x1
  73. MR8=0x8
  74. MR12=0x72
  75. MR14=0x72
  76. MR18=0x0
  77. MR19=0x0
  78. MR24=0x8
  79. MR25=0x0
  80. channel 1
  81. CS = 0
  82. MR0=0x18
  83. MR4=0x1
  84. MR5=0x1
  85. MR8=0x8
  86. MR12=0x72
  87. MR14=0x72
  88. MR18=0x0
  89. MR19=0x0
  90. MR24=0x8
  91. MR25=0x0
  92. CS = 1
  93. MR0=0x18
  94. MR4=0x1
  95. MR5=0x1
  96. MR8=0x8
  97. MR12=0x72
  98. MR14=0x72
  99. MR18=0x0
  100. MR19=0x0
  101. MR24=0x8
  102. MR25=0x0
  103. channel 0 training pass!
  104. channel 1 training pass!
  105. channel 0, cs 0, advanced training done
  106. channel 0, cs 1, advanced training done
  107. channel 1, cs 0, advanced training done
  108. channel 1, cs 1, advanced training done
  109. change freq to 856MHz 1,0
  110. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  111. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  112. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  113. OUT
  114. Boot1: 2019-03-14, version: 1.19
  115. CPUId = 0x0
  116. ChipType = 0x10, 254
  117. SdmmcInit=2 0
  118. BootCapSize=100000
  119. UserCapSize=14910MB
  120. FwPartOffset=2000 , 100000
  121. mmc0:cmd8,20
  122. mmc0:cmd5,20
  123. mmc0:cmd55,20
  124. mmc0:cmd1,20
  125. mmc0:cmd8,20
  126. mmc0:cmd5,20
  127. mmc0:cmd55,20
  128. mmc0:cmd1,20
  129. mmc0:cmd8,20
  130. mmc0:cmd5,20
  131. mmc0:cmd55,20
  132. mmc0:cmd1,20
  133. SdmmcInit=0 1
  134. StorageInit ok = 67892
  135. SecureMode = 0
  136. SecureInit read PBA: 0x4
  137. SecureInit read PBA: 0x404
  138. SecureInit read PBA: 0x804
  139. SecureInit read PBA: 0xc04
  140. SecureInit read PBA: 0x1004
  141. SecureInit read PBA: 0x1404
  142. SecureInit read PBA: 0x1804
  143. SecureInit read PBA: 0x1c04
  144. SecureInit ret = 0, SecureMode = 0
  145. atags_set_bootdev: ret:(0)
  146. GPT part:  0, name:            uboot, start:0x6000, size:0x2000
  147. GPT part:  1, name:            trust, start:0x8000, size:0x2000
  148. GPT part:  2, name:             boot, start:0xc000, size:0x10000
  149. GPT part:  3, name:           rootfs, start:0x5c000, size:0x1cc2fdf
  150. find part:uboot OK. first_lba:0x6000.
  151. find part:trust OK. first_lba:0x8000.
  152. LoadTrust Addr:0x8000
  153. No find bl30.bin
  154. Load uboot, ReadLba = 6000
  155. Load OK, addr=0x200000, size=0xe025c
  156. RunBL31 0x10000
  157. NOTICE:  BL31: v1.3(debug):51f2096
  158. NOTICE:  BL31: Built : 16:24:31, May  6 2019
  159. NOTICE:  BL31: Rockchip release version: v1.1
  160. INFO:    GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
  161. INFO:    Using opteed sec cpu_context!
  162. INFO:    boot cpu mask: 0
  163. INFO:    plat_rockchip_pmu_init(1181): pd status 3e
  164. INFO:    BL31: Initializing runtime services
  165. INFO:    BL31: Initializing BL32
  166. INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-221-gda2bcfdc #139 Mon Jun 17 03:14:33 UTC 2019 aarch64)

  167. INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2

  168. INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
  169. INFO:    BL31: Preparing for EL3 exit to normal world
  170. INFO:    Entry point address = 0x200000
  171. INFO:    SPSR = 0x3c9


  172. U-Boot 2017.09-g17808ce (Mar 24 2020 - 14:47:01 +0800)

  173. Model: Rockchip RK3399 Evaluation Board
  174. PreSerial: 2
  175. DRAM:  3.8 GiB
  176. Sysmem: init
  177. Relocation Offset is: f5be5000
  178. Using default environment

  179. dwmmc@fe320000: 1, sdhci@fe330000: 0
  180. Bootdev(atags): mmc 0
  181. MMC0: HS400, 150Mhz
  182. PartType: EFI
  183. get part misc fail -1
  184. boot mode: None
  185. Load FDT from boot part
  186. DTB: rk-kernel.dtb
  187. Android header version 0
  188. I2c speed: 400000Hz
  189. PMIC:  RK808
  190. vdd_center 900000 uV
  191. vdd_cpu_l 900000 uV
  192. LDO_REG4 init 3000000 uV
  193. vdd_log 1000000 uV
  194. Model: OrangePi 4
  195. Rockchip UBOOT DRM driver version: v1.0.1
  196. CLK: (uboot. arml: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  197. CLK: (uboot. armb: enter 24000 KHz, init 24000 KHz, kernel 0N/A)
  198.   aplll 816000 KHz
  199.   apllb 24000 KHz
  200.   dpll 856000 KHz
  201.   cpll 24000 KHz
  202.   gpll 800000 KHz
  203.   npll 600000 KHz
  204.   vpll 24000 KHz
  205.   aclk_perihp 133333 KHz
  206.   hclk_perihp 66666 KHz
  207.   pclk_perihp 33333 KHz
  208.   aclk_perilp0 266666 KHz
  209.   hclk_perilp0 88888 KHz
  210.   pclk_perilp0 44444 KHz
  211.   hclk_perilp1 100000 KHz
  212.   pclk_perilp1 50000 KHz
  213. Net:   eth0: ethernet@fe300000
  214. Hit key to stop autoboot('CTRL+C'):  0
  215. Could not find misc partition
  216. ANDROID: reboot reason: "(none)"
  217. Not AVB images, AVB skip
  218. Fdt Ramdisk skip relocation
  219. Booting IMAGE kernel at 0x00280000 with fdt at 0x8300000...
Copy code
Serial output with the Armbian image:
  1. DDR Version 1.22 20190506
  2. In
  3. channel 0
  4. CS = 0
  5. MR0=0x18
  6. MR4=0x1
  7. MR5=0x1
  8. MR8=0x8
  9. MR12=0x72
  10. MR14=0x72
  11. MR18=0x0
  12. MR19=0x0
  13. MR24=0x8
  14. MR25=0x0
  15. CS = 1
  16. MR0=0x18
  17. MR4=0x1
  18. MR5=0x1
  19. MR8=0x8
  20. MR12=0x72
  21. MR14=0x72
  22. MR18=0x0
  23. MR19=0x0
  24. MR24=0x8
  25. MR25=0x0
  26. channel 1
  27. CS = 0
  28. MR0=0x18
  29. MR4=0x1
  30. MR5=0x1
  31. MR8=0x8
  32. MR12=0x72
  33. MR14=0x72
  34. MR18=0x0
  35. MR19=0x0
  36. MR24=0x8
  37. MR25=0x0
  38. CS = 1
  39. MR0=0x18
  40. MR4=0x1
  41. MR5=0x1
  42. MR8=0x8
  43. MR12=0x72
  44. MR14=0x72
  45. MR18=0x0
  46. MR19=0x0
  47. MR24=0x8
  48. MR25=0x0
  49. channel 0 training pass!
  50. channel 1 training pass!
  51. change freq to 416MHz 0,1
  52. Channel 0: LPDDR4,416MHz
  53. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  54. Channel 1: LPDDR4,416MHz
  55. Bus Width=32 Col=10 Bank=8 Row=15/15 CS=2 Die Bus-Width=16 Size=2048MB
  56. 256B stride
  57. channel 0
  58. CS = 0
  59. MR0=0x18
  60. MR4=0x1
  61. MR5=0x1
  62. MR8=0x8
  63. MR12=0x72
  64. MR14=0x72
  65. MR18=0x0
  66. MR19=0x0
  67. MR24=0x8
  68. MR25=0x0
  69. CS = 1
  70. MR0=0x18
  71. MR4=0x1
  72. MR5=0x1
  73. MR8=0x8
  74. MR12=0x72
  75. MR14=0x72
  76. MR18=0x0
  77. MR19=0x0
  78. MR24=0x8
  79. MR25=0x0
  80. channel 1
  81. CS = 0
  82. MR0=0x18
  83. MR4=0x1
  84. MR5=0x1
  85. MR8=0x8
  86. MR12=0x72
  87. MR14=0x72
  88. MR18=0x0
  89. MR19=0x0
  90. MR24=0x8
  91. MR25=0x0
  92. CS = 1
  93. MR0=0x18
  94. MR4=0x1
  95. MR5=0x1
  96. MR8=0x8
  97. MR12=0x72
  98. MR14=0x72
  99. MR18=0x0
  100. MR19=0x0
  101. MR24=0x8
  102. MR25=0x0
  103. channel 0 training pass!
  104. channel 1 training pass!
  105. channel 0, cs 0, advanced training done
  106. channel 0, cs 1, advanced training done
  107. channel 1, cs 0, advanced training done
  108. channel 1, cs 1, advanced training done
  109. change freq to 856MHz 1,0
  110. ch 0 ddrconfig = 0x101, ddrsize = 0x2020
  111. ch 1 ddrconfig = 0x101, ddrsize = 0x2020
  112. pmugrf_os_reg[2] = 0x3AA1FAA1, stride = 0xD
  113. OUT
  114. Boot1: 2019-03-14, version: 1.19
  115. CPUId = 0x0
  116. ChipType = 0x10, 254
  117. SdmmcInit=2 0
  118. BootCapSize=100000
  119. UserCapSize=14910MB
  120. FwPartOffset=2000 , 100000
  121. mmc0:cmd5,20
  122. SdmmcInit=0 0
  123. BootCapSize=0
  124. UserCapSize=29544MB
  125. FwPartOffset=2000 , 0
  126. StorageInit ok = 122713
  127. SecureMode = 0
  128. SecureInit read PBA: 0x4
  129. SecureInit read PBA: 0x404
  130. SecureInit read PBA: 0x804
  131. SecureInit read PBA: 0xc04
  132. SecureInit read PBA: 0x1004
  133. SecureInit read PBA: 0x1404
  134. SecureInit read PBA: 0x1804
  135. SecureInit read PBA: 0x1c04
  136. SecureInit ret = 0, SecureMode = 0
  137. atags_set_bootdev: ret:(0)
  138. GPT part:  0, name:            uboot, start:0x6000, size:0x2000
  139. GPT part:  1, name:            trust, start:0x8000, size:0x2000
  140. GPT part:  2, name:             boot, start:0xc000, size:0x10000
  141. GPT part:  3, name:           rootfs, start:0x5c000, size:0x3957fdf
  142. find part:uboot OK. first_lba:0x6000.
  143. find part:trust OK. first_lba:0x8000.
  144. LoadTrust Addr:0x8000
  145. LoadTrust Addr:0x8400
  146. LoadTrust Addr:0x8800
  147. LoadTrust Addr:0x8c00
  148. LoadTrust Addr:0x9000
  149. LoadTrust Addr:0x9400
  150. LoadTrust Addr:0x9800
  151. LoadTrust Addr:0x9c00
  152. Addr:0x8000 No find trust.img!
  153. LoadTrustBL error:-3
  154. SecureMode = 0
  155. SecureInit read PBA: 0x4
  156. SecureInit read PBA: 0x404
  157. SecureInit read PBA: 0x804
  158. SecureInit read PBA: 0xc04
  159. SecureInit read PBA: 0x1004
  160. SecureInit read PBA: 0x1404
  161. SecureInit read PBA: 0x1804
  162. SecureInit read PBA: 0x1c04
  163. SecureInit ret = -2, SecureMode = 0
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 Author| Published in 2020-7-11 21:10:03 | Show all floors
Pretty sure that when I had flashed Armbian to the eMMC, the option was "boot from SPI, system on emmc/sdcard" or something along those lines, which means that probably the SPI boot got flashes with whatever is now causing this issue...

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 Author| Published in 2020-7-12 12:08:46 | Show all floors
BTW I end up in the same situation when I use Orange Pi's "install_to_emmc" script, can only boot opi images and not Armbian anymore.

I can tentatively conclude that:

1) some special structure needs to be preserved on the eMMC, and both Orange Pi's and Armbian's scripts mess that up
2) the Orange Pi sdcard images do have what is needed to allow them to boot even when the eMMC isn't setup correctly, while Armbian doesn't have that (not surprising as they are more standard images for a multitude of boards)
3) I need to safeguard my working emmc.img file forever in case I ever need it (and I will)

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 Author| Published in 2020-7-13 08:41:00 | Show all floors
Hi Narly9999, definitely need to upload it somewhere.

My findings so far is that the "Default" emmc image shows no partitions in fdisk or parted, and yet if I boot while pressing the recovery button I do end up in some Android recovery shell (through the serial).

Nothing happens when something else (Armbian or Orange Pi Ubuntu) is flashed to the emmc.

I've read somewhere (can't find the port, somewhere on Armbian) that there's some hidden image at the end of the emmc, which of course is what ends up being overwritten by Armbian or by install_to_emmc. I haven't hunted further to see if I find anything on the emmc image, but I'm curious about it and if I can make both that and the OS on emmc coexist...

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Published in 2023-2-6 23:18:25 from mobile | Show all floors
Can you help me ? I flashed a sd and could not make the OPi boot from it. I did armbian, Ubuntu, Debian. Whatever I use on the sd it boots from internal memory.

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