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Author: Demetris

Openwrt Designated Driver (Trunk) Build for Orange Pi PC/Pi Plus

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Post time 2016-4-3 20:46:49 | Show all posts
rizapn, thank you for detailed instructions
i was able to compile uImage, watchdog function is not disabled, just wdt_reset notificastions are disabled
https://drive.google.com/open?id=0B1f9dZyCaTxpTFFEUEdMV0owWVU

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Post time 2016-4-3 22:06:42 | Show all posts
Edited by rizapn at 2016-4-3 22:26

@hanza ... thank you.
But, I manage to do it myself after 2 days googling ... cross-compile it using my amd64 ubuntu machine

I also create a single complete img file ... (uImage without wdt_restart + script.bin + minimized openwrt from bananapi)
The img size is around 120MB ... 39MB after zipped. It is ready to flash using win32 Disk Imager.

For anyone who like to try it, here is the link : https://drive.google.com/file/d/0B4IKbsK0L5-9V1Vad0RlcGJBMVE/view?usp=sharing

username/password for openwrt-ssh : root/root

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Post time 2016-4-4 01:17:58 | Show all posts
great work rizapn,
i took your image, burned to 16gb sd card, extended root partition and now i have all 16gb available.
i will try to set point to point vpn, and hope that it would be able to handle more than 20mbit (my current mikrotik router)

what changes you did on script.bin?

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Post time 2016-4-4 06:29:52 | Show all posts
I change nothing in script.bin ... you got some difference?

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Post time 2016-4-5 01:15:35 | Show all posts
sorry, my fault, no changes

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Post time 2016-4-5 20:13:50 | Show all posts
I just found some other thing ...

Actually, not only the banana-pi OpenWrt build is compatible with OrangePi (with working built-in ethernet).
Generic Sunxi also work. And even, the Raspi2 rootfs is also runnable in our OPi ...

Here is the step (for OrangePi-PC) :
1) download my image from https://drive.google.com/open?id=0B4IKbsK0L5-9V1Vad0RlcGJBMVE
2) replace the rootfs part with the one from sunxi generic, for example : https://downloads.openwrt.org/ch ... rc3-sunxi-root.ext4 ... use dd command to write that file to /dev/sdb2 partition (or /dev/sdX2, depend on your card)
3) mount /dev/sdb2 to some path, for example /media
4) create or edit /media/etc/config/network, use this :

config interface 'loopback'
        option ifname 'lo'
        option proto 'static'
        option ipaddr '127.0.0.1'
        option netmask '255.0.0.0'

config interface 'lan'
        option ifname 'eth0'
        option proto 'dhcp'

5) put the card into your OrangePI-PC, boot, and enjoy it.

We still need to check, why there is watchdog error : sunxi_wdt_ioctl err, line 420 (address/pin not match the hardware?)

Hope it is helpful.

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Post time 2016-4-5 20:18:15 | Show all posts
Edited by rizapn at 2016-4-5 20:34

I also test the rootfs image from OP (Demetris, in the first post) ... and built-in ethernet is also work (using that /etc/config/network parameter and loboris uImage).

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Post time 2016-4-6 17:07:50 | Show all posts
Great! It's driver in openwrt with 3.4 linux kernel?
I have no success with OTG and i didn't try the usb otg in host mode only to know if the issue is OTG driver or usb PHY (otg need a usb phy).

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Post time 2016-4-6 17:15:19 | Show all posts
Edited by boob at 2016-4-6 17:18

I see that code in loboris kernel in ethernet driver, and i didn't find equivalent code in monjoie ethernet driver :

  1. if (IS_ERR(phydev)) {
  2.                 netdev_err(ndev, "Could not attach to PHY\n");
  3.                 goto err;
  4.         } else {
  5.                 netdev_info(ndev, "%s: PHY ID %08x at %d IRQ %s (%s)\n",
  6.                                 ndev->name, phydev->phy_id, phydev->addr,
  7.                                 "poll", dev_name(&phydev->dev));
  8. #if defined(CONFIG_ARCH_SUN8IW8) || defined(CONFIG_ARCH_SUN8IW7)
  9.                 if (priv->phy_ext == INT_PHY) {
  10.                         phy_write(phydev, 0x1f, 0x013d);
  11.                         phy_write(phydev, 0x10, 0x3ffe);
  12.                         phy_write(phydev, 0x1f, 0x063d);
  13.                         phy_write(phydev, 0x13, 0x8000);
  14.                         phy_write(phydev, 0x1f, 0x023d);
  15.                         phy_write(phydev, 0x18, 0x1000);
  16.                         phy_write(phydev, 0x1f, 0x063d);
  17.                         phy_write(phydev, 0x15, 0x132c);
  18.                         phy_write(phydev, 0x1f, 0x013d);
  19.                         phy_write(phydev, 0x13, 0xd602);
  20.                         phy_write(phydev, 0x17, 0x003b);
  21.                         phy_write(phydev, 0x1f, 0x063d);
  22.                         phy_write(phydev, 0x14, 0x7088);
  23.                         phy_write(phydev, 0x1f, 0x033d);
  24.                         phy_write(phydev, 0x11, 0x8530);
  25.                         phy_write(phydev, 0x1f, 0x003d);
  26.                 }
Copy the Code


Someone understand what is the part of code, use?
this phy write for internal phy look strange and there is no documentation about that.
intphy_write(struct phy_device * phydev,u16 regnum,u16 val);

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Post time 2016-4-6 20:12:20 | Show all posts
Some sequence to write values to the registry.
Turn ON and OFF some bits (0x013d => 0x063d => 0x023d are only 1 or 2 bits difference),
but do not know what are they really doing ...
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